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Defines |
| #define | MAX_PARM_DEVICES 8 |
| #define | PARM_MIN_MAX "1-" __MODULE_STRING(MAX_PARM_DEVICES) |
| #define | DEF_INTS -1, -1, -1, -1, -1, -1, -1 |
| #define | GET_INT_PARM(var, idx) var[var[idx] < 0 ? 0 : idx] |
| #define | ETH_P_HOSTAP ETH_P_CONTROL |
| #define | ARPHRD_IEEE80211 801 |
| #define | ARPHRD_IEEE80211_PRISM 802 |
| #define | LWNG_CAP_DID_BASE (4 | (1 << 6)) |
| #define | LWNG_CAPHDR_VERSION 0x80211001 |
| #define | HFA384X_LEVEL_TO_dBm(v) 0x100 + (v) * 100 / 255 - 100 |
| #define | HFA384X_RSSI_LEVEL_TO_dBm(v) ((v) - 100) |
| #define | HFA384X_SCAN_IN_PROGRESS 0 |
| #define | HFA384X_SCAN_HOST_INITIATED 1 |
| #define | HFA384X_SCAN_FIRMWARE_INITIATED 2 |
| #define | HFA384X_SCAN_INQUIRY_FROM_HOST 3 |
| #define | HFA384X_SCAN_MAX_RESULTS 32 |
| #define | HFA384X_CMDCODE_INIT 0x00 |
| #define | HFA384X_CMDCODE_ENABLE 0x01 |
| #define | HFA384X_CMDCODE_DISABLE 0x02 |
| #define | HFA384X_CMDCODE_ALLOC 0x0A |
| #define | HFA384X_CMDCODE_TRANSMIT 0x0B |
| #define | HFA384X_CMDCODE_INQUIRE 0x11 |
| #define | HFA384X_CMDCODE_ACCESS 0x21 |
| #define | HFA384X_CMDCODE_ACCESS_WRITE (0x21 | BIT(8)) |
| #define | HFA384X_CMDCODE_DOWNLOAD 0x22 |
| #define | HFA384X_CMDCODE_READMIF 0x30 |
| #define | HFA384X_CMDCODE_WRITEMIF 0x31 |
| #define | HFA384X_CMDCODE_TEST 0x38 |
| #define | HFA384X_CMDCODE_MASK 0x3F |
| #define | HFA384X_TEST_CHANGE_CHANNEL 0x08 |
| #define | HFA384X_TEST_MONITOR 0x0B |
| #define | HFA384X_TEST_XMIT 0x0E |
| #define | HFA384X_TEST_STOP 0x0F |
| #define | HFA384X_TEST_CFG_BITS 0x15 |
| #define | HFA384X_TEST_CFG_BIT_ALC BIT(3) |
| #define | HFA384X_CMD_BUSY BIT(15) |
| #define | HFA384X_CMD_TX_RECLAIM BIT(8) |
| #define | HFA384X_OFFSET_ERR BIT(14) |
| #define | HFA384X_OFFSET_BUSY BIT(15) |
| #define | HFA384X_PROGMODE_DISABLE 0 |
| #define | HFA384X_PROGMODE_ENABLE_VOLATILE 1 |
| #define | HFA384X_PROGMODE_ENABLE_NON_VOLATILE 2 |
| #define | HFA384X_PROGMODE_PROGRAM_NON_VOLATILE 3 |
| #define | HFA384X_AUX_MAGIC0 0xfe01 |
| #define | HFA384X_AUX_MAGIC1 0xdc23 |
| #define | HFA384X_AUX_MAGIC2 0xba45 |
| #define | HFA384X_AUX_PORT_DISABLED 0 |
| #define | HFA384X_AUX_PORT_DISABLE BIT(14) |
| #define | HFA384X_AUX_PORT_ENABLE BIT(15) |
| #define | HFA384X_AUX_PORT_ENABLED (BIT(14) | BIT(15)) |
| #define | HFA384X_AUX_PORT_MASK (BIT(14) | BIT(15)) |
| #define | PRISM2_PDA_SIZE 1024 |
| #define | HFA384X_EV_TICK BIT(15) |
| #define | HFA384X_EV_WTERR BIT(14) |
| #define | HFA384X_EV_INFDROP BIT(13) |
| #define | HFA384X_EV_INFO BIT(7) |
| #define | HFA384X_EV_DTIM BIT(5) |
| #define | HFA384X_EV_CMD BIT(4) |
| #define | HFA384X_EV_ALLOC BIT(3) |
| #define | HFA384X_EV_TXEXC BIT(2) |
| #define | HFA384X_EV_TX BIT(1) |
| #define | HFA384X_EV_RX BIT(0) |
| #define | HFA384X_INFO_HANDOVERADDR 0xF000 |
| #define | HFA384X_INFO_HANDOVERDEAUTHADDR 0xF001 |
| #define | HFA384X_INFO_COMMTALLIES 0xF100 |
| #define | HFA384X_INFO_SCANRESULTS 0xF101 |
| #define | HFA384X_INFO_CHANNELINFORESULTS 0xF102 |
| #define | HFA384X_INFO_HOSTSCANRESULTS 0xF103 |
| #define | HFA384X_INFO_LINKSTATUS 0xF200 |
| #define | HFA384X_INFO_ASSOCSTATUS 0xF201 |
| #define | HFA384X_INFO_AUTHREQ 0xF202 |
| #define | HFA384X_INFO_PSUSERCNT 0xF203 |
| #define | HFA384X_INFO_KEYIDCHANGED 0xF204 |
| #define | HFA384X_RATES_1MBPS BIT(0) |
| #define | HFA384X_RATES_2MBPS BIT(1) |
| #define | HFA384X_RATES_5MBPS BIT(2) |
| #define | HFA384X_RATES_11MBPS BIT(3) |
| #define | HFA384X_ROAMING_FIRMWARE 1 |
| #define | HFA384X_ROAMING_HOST 2 |
| #define | HFA384X_ROAMING_DISABLED 3 |
| #define | HFA384X_WEPFLAGS_PRIVACYINVOKED BIT(0) |
| #define | HFA384X_WEPFLAGS_EXCLUDEUNENCRYPTED BIT(1) |
| #define | HFA384X_WEPFLAGS_HOSTENCRYPT BIT(4) |
| #define | HFA384X_WEPFLAGS_HOSTDECRYPT BIT(7) |
| #define | HFA384X_RX_STATUS_MSGTYPE (BIT(15) | BIT(14) | BIT(13)) |
| #define | HFA384X_RX_STATUS_PCF BIT(12) |
| #define | HFA384X_RX_STATUS_MACPORT (BIT(10) | BIT(9) | BIT(8)) |
| #define | HFA384X_RX_STATUS_UNDECR BIT(1) |
| #define | HFA384X_RX_STATUS_FCSERR BIT(0) |
| #define | HFA384X_RX_STATUS_GET_MSGTYPE(s) (((s) & HFA384X_RX_STATUS_MSGTYPE) >> 13) |
| #define | HFA384X_RX_STATUS_GET_MACPORT(s) (((s) & HFA384X_RX_STATUS_MACPORT) >> 8) |
| #define | HFA384X_TX_CTRL_ALT_RTRY BIT(5) |
| #define | HFA384X_TX_CTRL_802_11 BIT(3) |
| #define | HFA384X_TX_CTRL_802_3 0 |
| #define | HFA384X_TX_CTRL_TX_EX BIT(2) |
| #define | HFA384X_TX_CTRL_TX_OK BIT(1) |
| #define | HFA384X_TX_STATUS_RETRYERR BIT(0) |
| #define | HFA384X_TX_STATUS_AGEDERR BIT(1) |
| #define | HFA384X_TX_STATUS_DISCON BIT(2) |
| #define | HFA384X_TX_STATUS_FORMERR BIT(3) |
| #define | HFA386X_CR_TX_CONFIGURE 0x12 |
| #define | HFA386X_CR_RX_CONFIGURE 0x14 |
| #define | HFA386X_CR_A_D_TEST_MODES2 0x1A |
| #define | HFA386X_CR_MANUAL_TX_POWER 0x3E |
Enumerations |
| enum | {
HFA384X_LINKSTATUS_CONNECTED = 1, HFA384X_LINKSTATUS_DISCONNECTED = 2, HFA384X_LINKSTATUS_AP_CHANGE = 3, HFA384X_LINKSTATUS_AP_OUT_OF_RANGE = 4,
HFA384X_LINKSTATUS_AP_IN_RANGE = 5, HFA384X_LINKSTATUS_ASSOC_FAILED = 6
} |
| enum | {
HFA384X_PORTTYPE_BSS = 1, HFA384X_PORTTYPE_WDS = 2, HFA384X_PORTTYPE_PSEUDO_IBSS = 3, HFA384X_PORTTYPE_IBSS = 0,
HFA384X_PORTTYPE_HOSTAP = 6
} |
| enum | { HFA384X_RX_MSGTYPE_NORMAL = 0, HFA384X_RX_MSGTYPE_RFC1042 = 1, HFA384X_RX_MSGTYPE_BRIDGETUNNEL = 2, HFA384X_RX_MSGTYPE_MGMT = 4 } |
Variables |
| linux_wlan_ng_val | packed |
1.4.1